Beckhoff’s AX8000 multi-axis servo system can be used to configure multi-channel drive solutions in an exceptionally compact form factor. A special feature is the eXtreme Fast Control (XFC) technology from Beckhoff, which provides very short processing times for EtherCAT frames. With TwinCAT supporting drive control, users can create motion control IP intellectual property (IP) with algorithms that are executed by the CPU/FPU of the motion controller. This reduces development costs and enables innovative motion control concepts.
Until recently the PLC, motion control (CNC) and fieldbus were not generally synchronised in automation systems. In large systems based on Profibus, for example, this could easily lead to response times of several hundred milliseconds.
State-of-the-art control technology
Today, it is common practice to use industrial PCs in automation to handle PLC, CNC and visualisation from a single hardware device. Another trend points toward increased implementation of Ethernet-based fieldbuses, such as EtherCAT, in new machines. Using state-of-the-art technology, it is quite easy to operate PLC, CNC and fieldbus with synchronised cycle times in the millisecond range. The achievable cycle times primarily depend on the size of the machine, the computing power of the processor and the configuration of the fieldbus. For CNC-equipped machines, the cycle time of motion control and EtherCAT as the fieldbus is generally around 1 ms. The controlled servo drives feature higher internal clock frequency using fine interpolation algorithms to ensure the required path accuracy.
In the usual time sequence of responses to a process event, the processor reads the fieldbus process image, executes the PLC and CNC routines and provides the calculated data words for output with the next fieldbus cycle. The trigger signal for scanning (input) or stopping (output) is the EtherCAT distributed clocks (DC) signal. Between sampling of the inputs and the passing of frames, the EtherCAT slaves have time to provide the data for online processing in an EtherCAT ASIC or FPGA. Similarly, this applies to processing of the output signals up to their output with the next DC.
Since all cycle times are synchronised, the response time from the scanning operation is completely deterministic. An unwanted – and for the user often surprising – effect is the resulting response time of approximately 2 – 3 cycles, i.e. 2 – 3 ms at a cycle time of 1 ms. For responses via motion control, an additional factor is the systemic delay associated with fine interpolation of exactly one cycle. The overall delay for a motion control response is 3 – 4 cycles. In cases where a CNC machine has to respond quickly to high forces or torques – for closed-loop control – the delay time described above affects the behaviour of the control system.
First steps to optimising cycle times
A significant reduction in system reaction time can be achieved by selecting significantly smaller cycle times. In a first step, a reduction of the cycle time from 1 ms to 250 μs is considered. This reduces the system reaction time (about 4 cycles) from 4 ms to only 1 ms, and 250 μs is easily achievable with EtherCAT-based communication and advanced drive technology. Naturally, the load on the IPC depends on the application and the processor type.
Race to the bottom for cycle times
In a second step, the cycle time can be reduced further to 125 μs, for example. It should be noted for EtherCAT communication, the time tolerances now become lower. However, sending and receiving at a 125 μs cycle time is easily achievable with a suitably configured, high performance industrial PC. Typically, a time window of around 80 μs remains for the (usually parallel) processing of algorithms. At 125 μs, it may make sense to distribute the CNC to multiple cores. One core may calculate the maximum possible path speed using look-ahead algorithms, for example, and another core could generate the current set path values for the drives.
A cycle time of 125 μs is comparatively short for a standard drive. In order to reduce the load, the position control can also be configured to 125 μs. Fine interpolation is then no longer required, which reduces the system reaction time by the fine interpolation cycle to 3 – 4 cycles or around 500 μs. However, without fine interpolation it is necessary that, in addition to the set position, the speed pre-control, and often the acceleration pre-control as well, is calculated by the central processor and made available via EtherCAT.
Signal processing in the AX8000 multi-axis servo system
In drive technology, the wheat is separated from the chaff, so to speak, at cycle times below 125 μs: Achieving an EtherCAT cycle time of 62,5 μs is not difficult. However, simultaneously ensuring that the power semiconductors respond as specified just a few microseconds after the EtherCAT frame has arrived – triggered by the Distributed Clocks signal – is a challenge.
The AX8000 meets this challenge in every respect. To the outside, the AX8000 communicates via the supply module using EtherCAT with standard Ethernet technology. Internally, the AX8000 uses the EtherCAT Terminal system bus (E-bus), which delays the Ethernet frames by only a few nanoseconds. The core component of the axis modules is a powerful FPGA, which integrates programmable logic and a dual-core ARM CPU on a single silicon chip.
The programmable logic is mainly used by configured and connected VHDL IP modules: the drive IP core, the EtherCAT IP core, the feedback IP and the flexible DMA unit.
Drive IP core: VHDL-coded, field-oriented motor control
The entirely hardware-implemented (VHDL) current controller combines the advantages of analog and digital control technology. This enables a response to unwanted control deviations, for example, within just one microsecond, without an overcurrent shutdown being triggered.
EtherCAT IP core: on-the-fly processing of EtherCAT frames
The EtherCAT IP core enables the EtherCAT communication function to be implemented within an FPGA. The EtherCAT functionality, including the number of FMMUs and SYNC managers and the size of the DPRAM, is configured according to the requirements of the AX8000. The features are compatible with the EtherCAT specification and the EtherCAT ASICs (ET1100, ET1200).
Feedback IP enables coupling of encoders
All Beckhoff servomotors from the AM8000 family are equipped with One Cable Technology (OCT) as standard, which consolidates power and feedback in a single cable. Communication with the encoders integrated in the motors takes place via an OCT feedback IP implemented in the FPGA, where it is internally synchronised with the EtherCAT DC signal. Optionally, EnDAT encoders can also be used.
Flexible DMA unit
Instead of connecting these IP blocks using many signal paths and multiplexers, two options are supported within the FPGA. The data words are either read or written by the processor, or they are copied with nanosecond precision with a DMA unit, independent of the processor. In this way, it is possible to transfer set values that are triggered by the DC signal, for example from the EtherCAT IP dual-port RAM to drive IP registers, within a few nanoseconds. Similarly, an actual value can be copied – also time-triggered – from the encoder to the EtherCAT IP dual-port RAM, which is sent to the controller when the corresponding EtherCAT frame is processed again.
The exceptionally low latency time, in combination with the VHDL control technology, allows EtherCAT frames with set values to be processed just before the DC signal, or EtherCAT frames to be processed shortly after the DC signal for the transfer of the actual values. The extremely low latency time enables the IPC algorithms to take more time. Alternatively, the cycle time can be reduced. In practice, this means that the AX8000 can process two frames per cycle, even at a cycle time of only 62,5 μs. However, it should be noted that such high performance is only possible in small subsystems with relatively short Ethernet frames. In larger systems, the required cycle time can be achieved by subdividing the fieldbus communication to several parallel strands.
Motion control IP
In recent years, many teams have been engaged in the research and development of innovative algorithms for synchronous, reluctance and asynchronous machines, or specific projects such as linearisation of toggle kinematics. Due to the lack of open, standardised interfaces, time and again individual hardware components are created in small quantities.
So far, the concept of IP has not been applied to drive control. Manufacturers usually do not disclose the device architecture to machine builders or end customers. This is mainly due to the low computing power of the microcontrollers or DSPs used in the past, which are usually programmed in Assembler or hardware-oriented ‘C’.
The use of IP is an obvious choice, however, for a TwinCAT-based servo drive. Thanks to the hardware available today, the programming of a drive is much less time-critical. The number of tasks required within a drive is reduced, due to the fact that some of the algorithms within the FPGA are implemented in VHDL. Complex algorithms can be calculated with the high performance ARM CPU with FPU. In addition, the power of the installed processor is used much more efficiently through the use of compiler technology.
MATLAB/Simulink from MathWorks is the standard tool for simulating closed loop systems. Virtually all development departments have at least one licence. The connection of MATLAB/Simulink enables execution of TwinCAT modules that were generated as models in the Simulink simulation environment. Through the integration with TwinCAT, parameters and variables can be displayed in the graphical user interface of TwinCAT 3 and can also be viewed and modified in the real-time environment at runtime.
For more information contact Kenneth McPherson, Beckhoff Automation, +27 (0)11 795 2898, [email protected], www.beckhoff.co.za
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